VHDL
Hardware description · 1983Actively developedDigital hardware description for simulation and synthesis.
Concurrent · Hardware description
Links
- Reference / standard
- https://ghdl.github.io/ghdl/
- Wikipedia (English)
- https://en.wikipedia.org/wiki/VHDL
Tracked release
- Version
- IEEE 1076-2019
- Artifact
- Language standard
- Published
- 2019
- Source checked
- 2026-10-22
Use & ecosystem
- Suited for
- Hardware design / verification
- Family / tradition
- Hardware description
- Maturity
- Established
- Ecosystem breadth
- Focused
Long industrial use and stable standards establish maturity. Its ecosystem is specialized electronic-design tooling, not a general software application ecosystem.
Industry & practical use
FPGA design, digital logic modeling and hardware verification are central uses. Synthesizable constructs are only a subset of the language accepted by simulation tools.
Compilers, libraries & tooling
Commercial vendor tools and open-source simulators such as GHDL provide different standard coverage. FPGA/ASIC synthesis depends on a compatible downstream toolchain.
Platforms & deployment
- General toolchains
- FPGA, ASIC
- Specialized tooling
- None catalogued
- Native cross-compilation
- Not the usual deployment model
FPGA and ASIC describe resulting hardware targets. Linux/Windows support of an editor or simulator is not equivalent to executing the design as an ordinary OS application.
Hardware synthesis maps a design to circuitry; it is intentionally not classified as software native cross-compilation.
Project health & support
IEEE standardization and independent tool vendors support the language. Actual revision support and device availability depend on each tool release.
Use, ecosystem & platform assessment reviewed 2026-10-22 · Sources below
History & origin
VHDL originated in the US VHSIC program in the early 1980s and was standardized by IEEE in 1987. It describes concurrent hardware behavior as well as sequential processes.
- Creators
- United States Department of Defense, Intermetrics, IBM, Texas Instruments
- Origin
- 1983 — Initial language version; IEEE standardization followed in 1987.
Influences & descendants
Influenced by
- Not yet documented in this catalogue.
Influenced in this catalogue
- No linked entries yet.
Language features
- Typing
- Static
- Execution
- Simulation, Synthesis
- Block structure
- Explicit delimiters
- Semicolons
- Required
- Lexical closures
- No
- Namespaced modules
- Yes
- Pattern matching
- No
- Macro system
- No built-in macro system
Implementation notes
- Simulation and synthesis are separate execution/deployment categories. Behavioral testbench code need not be synthesizable.
Sources & references
- Project overview
- https://standards.ieee.org/ieee/1076/5179/
- Language / implementation reference
- https://ghdl.github.io/ghdl/
Use, ecosystem & platform sources
- Project overview
- https://standards.ieee.org/ieee/1076/5179/
- Language / implementation reference
- https://ghdl.github.io/ghdl/
See the classification definitions for implementation-dependent features. Influence links cover the entries documented here.